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Design Methodology Sr
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Experis, ManpowerGroup, hiring for AI enablers for?Micron's new product development facility in Guadalajara, Mexico, focused on providing Micron's memory solutions and information technology operations. Micron Technology a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Design Methodology – Senior/ Principal DRAM Design (E4/E5)
As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design, and validation resulting in world-class memory solutions.
Our team vision is a continuing desire to develop your skills working in an inclusive diverse environment of multicultural Teams across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity.
(Disclaimer): While you may not exhibit all of the characteristics/skills listed below today, we are highly interested in a teammate motivated to grow in technical breadth and depth. Suppose you are open to learning while being a valued member of a team of premier engineers. In that case, we are determined to help build upon your existing foundation, while rapidly growing your individual and collaborative skills in this exciting and outstanding opportunity.
What's Encouraged Daily:
• Contributing to the development of new product, design flows and methodologies by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits.
• Evaluate and identify the best-known practices and communicate to all DRAM teams.
• Performing verification processes with modeling and simulation using industry-standard simulators. Analyze results to confirm simulation to silicon correlation.
• Overseeing the layout process including floor planning, placement, and routing.
• Contributing to cross-group communication to work towards standardization and group success.
• Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality.
• Driving innovation into the future Memory generations within a dynamic work environment
How To Qualify:
• BS with 5+ years' experience or MS with 3+ years' experience
• Proven knowledge/experience of CMOS Circuit Design and Device Physics
• Design digital or analog circuits using CMOS logic gates and transistors.
• Create floorplans that optimize for the best circuit placement, signal routing, and power delivery.
• Using Spice and Verilog, simulate to verify proper circuit operation. Analyze circuits for power consumption, speed performance, and reliability.
• Model layout parasitics in the simulation and verify proper signal routing and power supply connections.
• Proven knowledge/experience with Verilog modeling and simulation tools
Interested candidates should send their CVs through this channel.
ID: 19062597